Essay No. 062 · Foundry Power & AI Allocation
TSMC Became the Allocation Layer of AI Compute. Original analysis Not investment advice
In 2021, the question was whether TSMC could make Intel dependent on external manufacturing. In 2026, the bigger story is clearer: TSMC does not just manufacture chips. It allocates the world's scarcest advanced-node, advanced-packaging and AI compute capacity.
TSMC is no longer just the foundry behind chips. It is the allocation layer for scarce AI compute manufacturing — deciding how advanced-node wafers, CoWoS slots, SoIC and HBM integration flow to the world's most important chip designers.
The easiest way to misunderstand TSMC is to think it only sells wafers.
TSMC sells manufacturing certainty, timing, yield learning, process design kits, the IP ecosystem, design enablement, advanced packaging, CoWoS, SoIC, InFO, customer trust, and access to scarce capacity. When capacity is abundant, a foundry sells wafers. When capacity is scarce, a foundry allocates access. The company says it is everyone's foundry, and in one sense that is true. But not every customer gets the same terms, timing, integration depth, or leverage.
In the AI era, this matters more because the bottleneck is no longer only leading-edge wafers. It is also CoWoS, HBM integration, SoIC, advanced packaging, yield-learning windows, and multi-year capacity reservations.
Everyone's foundry does not mean everyone's terms.
Section 01 What the 2021 TSMC wafer-supply article got right
The 2021 SemiAnalysis piece on TSMC's wafer-supply agreements is the historical anchor for this essay[1]. It argued that TSMC says it is everyone's foundry, but customer terms differ widely. Apple was described as TSMC's most important customer, roughly three times larger than the second-largest at the time, and uniquely integrated with TSMC, including helping define base PDKs for new nodes and driving early utilization. AMD and MediaTek were described as preferred customers because they ran mostly exclusive on TSMC's leading-edge nodes, with MediaTek helping drive N6 and N4 evolutions and AMD acting as a packaging trailblazer and early ramp partner for 3D hybrid bonding.
The piece flagged Nvidia and Qualcomm as more opportunistic customers because they played Samsung and TSMC against each other, with Nvidia making roughly $1.64B of advance payments in one quarter and planning another $1.79B of future payments, and Qualcomm carrying around $13B of purchase obligations across suppliers. The TSMC Q3 2021 filing on page 5 showed temporary receipts from customers to retain fab capacity. And the article framed Intel as the strategic prize: TSMC's long game was to make Intel product teams comfortable choosing TSMC nodes when Intel internal manufacturing looked uncertain[1].
- TSMC says it is everyone's foundry, but customer terms differ widely.
- Apple was the most important customer, integrated into PDK definition and early-node ramps.
- AMD and MediaTek were preferred customers via TSMC-leaning exclusivity and node-evolution work.
- AMD was an early ramp partner for 3D hybrid bonding.
- Nvidia and Qualcomm were opportunistic, multi-sourcing across Samsung and TSMC.
- Nvidia ~$1.64B of advance payments in one quarter; ~$1.79B planned.
- Qualcomm ~$13B of purchase obligations across suppliers including TSMC-related lines.
- Page 5 TSMC Q3 2021 filing showed temporary receipts to retain capacity.
- Intel was framed as the strategic prize: get Intel product teams comfortable with TSMC.
The 2021 article was right about the power dynamic. TSMC's leverage came from differentiated customer access, not just from owning fabs. The 2026 question is what that leverage has become as AI demand reshapes the picture.
Section 02 From smartphone cycle to AI/HPC allocation
TSMC used to be understood heavily through the iPhone cycle. That is still important, but the center of gravity moved. TSMC's 2025 Form 20-F shows HPC revenue reaching NT$2.193T in 2025, equal to 58% of 2025 net revenue, with smartphone at 29%. HPC was 43% in 2023 and 51% in 2024 before reaching 58% in 2025, with HPC revenue growing 48% year over year from 2024 to 2025[2].
The allocation problem became less about mobile seasonality and more about AI accelerators, server CPUs, custom ASICs, networking, and the advanced packaging that ties them together. TSMC is now structurally more exposed to AI/HPC than to the old smartphone-first cycle.
Section 03 Advanced-node concentration increased leverage
TSMC's 2025 Form 20-F also discloses the wafer-revenue mix by node. 3 nm was 24% of 2025 wafer revenue, 5 nm was 36%, and 7 nm was 14%, putting 7 nm and below at 74% of wafer revenue[2]. The more revenue concentrates at advanced nodes, the more TSMC's leverage concentrates around customers that need the best nodes.
Customers are not only buying capacity. They are buying entry into a small set of process platforms with high yield learning, mature PDKs, and proven ecosystems. The scarce resource is not generic wafer starts. It is qualified advanced-node capacity.
Section 04 Temporary receipts, the financialization of access
The clearest piece of TSMC disclosure on the allocation dynamic is the temporary receipts line. The 2025 Form 20-F notes that some customers pay temporary receipts to retain specified fab capacity, with year-end 2025 temporary receipts at NT$189.858B (current NT$146.559B, noncurrent NT$43.299B), and explains that the treatment can include refund or offsetting against accounts receivable when contract terms are satisfied[2].
Capacity is no longer just ordered. It is reserved, financed, committed to and fought over years in advance.
This is not normal spot purchasing. Capacity has become something customers reserve financially. The system looks less like buying chips and more like securing access to an industrial bottleneck.
Section 05 Nvidia shows the customer side of the allocation war
Nvidia's FY2026 10-K describes the customer-side mechanics in detail. Nvidia uses foundries including TSMC and Samsung. Long manufacturing lead times and uncertain supply or capacity can create mismatches between supply and demand. Nvidia has paid premiums, provided deposits, and entered long-term supply agreements and capacity commitments to secure future supply. As of January 25, 2026, Nvidia disclosed $95.2B of outstanding inventory purchase and long-term supply and capacity obligations, with substantially all of those commitments expected to be paid through fiscal year 2027[3].
Nvidia is no longer simply placing purchase orders. Nvidia is financially locking down supply. That is what AI-scale demand does to the foundry relationship. AI chips turned supply agreements into strategic weapons.
Section 06 CoWoS changed the meaning of foundry capacity
TSMC's 2026 Technology Symposium reframes what foundry capacity means. TSMC is producing 5.5-reticle-size CoWoS, plans 14-reticle-size CoWoS in 2028 with around 10 large compute dies and 20 HBM stacks per package, and expects further expansion beyond 14 reticles in 2029. TSMC is also advancing SoIC, with A14-to-A14 SoIC planned for production availability in 2029 at 1.8x higher die-to-die IO density than N2-on-N2 SoIC. The COUPE co-packaged optics solution on substrate is targeted to begin production in 2026 with 2x power efficiency and 10x latency reduction versus pluggable board-level versions[4].
TSMC is no longer only allocating wafers. It is allocating package-scale AI systems. A customer needs the logic wafer, the HBM attach path, the interposer, the substrate, the packaging slot, the thermal path, and the integration ecosystem. The scarce resource is no longer only wafer starts. It is the right node, in the right quarter, with the right packaging capacity.
TSMC's real product is not only wafers. It is manufacturing certainty.
Advanced-node wafers
PDK & IP ecosystem
Yield-learning windows
CoWoS capacity
SoIC
HBM integration
Packaging slots
Customer commitments
Roadmap timing
Section 07 Apple, the old privileged model
Apple's power in the 2021 framing came from early-node mobile volume, predictability, tight PDK integration, and willingness to pay. Apple drove first-year utilization for N7 and N5, helped define early PDKs, and had seasonal flexibility, with TSMC prebuilding N5 wafers ahead of the iPhone cycle and Apple notably not prepaying in the same way as some other customers[1].
That model still matters, but AI/HPC changed the center of gravity. In the smartphone era, Apple was the anchor customer. In the AI era, Nvidia-class capacity urgency changes the allocation game. Apple taught TSMC how to build around a privileged customer. AI taught everyone else how expensive access could become.
Section 08 AMD and MediaTek, preferred customers through alignment
AMD and MediaTek were the 2021 article's preferred customers because they were mostly exclusive on TSMC's leading-edge nodes. MediaTek helped drive N6 and N4 node evolutions. AMD designed custom libraries and worked closely on N5, and acted as a ramp partner for 3D hybrid bonding[1].
Preferred customer status is not only about size. It is about alignment. If a customer commits deeply to TSMC's roadmap, TSMC has more reason to optimize with them. TSMC rewards customers that make its roadmap more valuable.
Section 09 Nvidia and Qualcomm, optionality has a price
Nvidia and Qualcomm were the 2021 article's opportunistic customers, playing Samsung and TSMC against each other. That gave them price and supply flexibility in some periods. But when they needed large amounts of TSMC leading-edge capacity, they had to make stronger commitments. The 2021 advance-payment example for Nvidia and the large purchase-obligation profile for Qualcomm, including the eventual return of high-end Snapdragon to TSMC, illustrate the cost of optionality[1].
The 2026 update sharpens this. Nvidia's $95.2B inventory and long-term supply commitments at end of FY2026 show that AI demand made optionality much more expensive[3]. Multi-sourcing can improve leverage during normal times. When the best capacity is scarce, the supplier with the best capacity gains leverage.
Section 10 Intel, the strategic prize
Intel remains the most complicated customer because it is also trying to become a competing foundry. The 2021 framing was that TSMC wanted Intel design and product teams to become comfortable choosing external nodes, with Intel having moved toward more industry-standard SoC design flows and a roadmap that included chiplets on both in-house and external processes[1].
The 2026 update has Intel trying to reverse the dependency story. Intel says Panther Lake is the first client SoC built on Intel 18A and has entered production, with Fab 52 in Arizona ramping toward high-volume 18A manufacturing[5]. Lip-Bu Tan's reset memo says future Intel 14A investment will be tied to confirmed customer commitments and that "there are no more blank checks; every investment must make economic sense."[6]
The Intel fight is not only about capacity. It is about which manufacturing roadmap Intel product teams trust.
TSMC wants Intel product teams comfortable with TSMC. Intel wants internal nodes to become good enough that product teams choose Intel again. This is not dependency in one direction. It is a design-team trust battle that will play out over multiple generations.
Section 11 Broadcom and custom silicon
The 2021 article described Broadcom as a large TSMC customer with a diverse supply chain, slower growing and cautious with capacity commitments, with exposure in networking and RFFE[1]. The right 2026 update treats Broadcom as part of the broader custom AI ASIC and networking story, without inventing specific TSMC deal terms.
The general point holds at a higher level. Custom silicon customers need TSMC not only for wafers but for advanced process and package integration. AI networking and custom ASICs make TSMC allocation matter beyond GPU companies.
Section 12 ASML confirms the macro pull
TSMC's allocation power exists because the equipment stack is also scarce. ASML's Q4 2025 results reported Q4 net bookings of EUR 13.2B, EUV bookings of EUR 7.4B, and an end-2025 backlog of EUR 38.8B, with ASML noting that customers had a more positive medium-term view mainly because of sustainable AI-related demand[7].
EUV tools, advanced packaging equipment, HBM supply, and substrates all limit how fast capacity can expand. TSMC allocates capacity, but the whole upstream tool chain determines how much capacity can exist.
Section 13 The new customer hierarchy
Customer leverage at TSMC depends on a mix of scale, roadmap alignment, willingness to prepay or commit, early-node adoption, packaging needs, AI/HPC growth, seasonal demand shape, multi-sourcing behavior, strategic value, contribution to ecosystem learning, dependence on CoWoS and SoIC, and whether the customer makes TSMC more defensible. The 2026 ranking is not a revenue table. It is a map of leverage.
| Customer | Source of leverage | 2026 pressure point |
|---|---|---|
| Apple | Early-node anchor, PDK influence, seasonal flexibility, no aggressive prepayment. | Smartphone-first share gradually outweighed by AI/HPC center of gravity. |
| AMD | TSMC alignment, custom libraries, packaging partnership including 3D hybrid bonding. | Competes with Nvidia for the same CoWoS and HBM packaging slots. |
| MediaTek | Node-evolution partner for N6 and N4; mobile volume across regions. | Mobile cycle exposure even as AI/HPC dominates TSMC's mix. |
| Nvidia | AI urgency, advanced packaging dependence, very large capacity commitments. | Disclosed $95.2B of outstanding inventory and long-term supply obligations. |
| Qualcomm | Large mobile customer; historic multi-sourcing with Samsung; high-end Snapdragon flows. | Optionality is more expensive when AI demand absorbs the leading-edge queue. |
| Broadcom | Networking, custom ASIC and RFFE exposure; diverse supply chain. | Custom AI silicon pulls Broadcom into the advanced-packaging queue too. |
| Intel | Both customer and foundry competitor; product-team trust battle on 18A and beyond. | Has to make internal manufacturing economically credible while still using TSMC where it must. |
Section 14 What people got wrong in 2021
The weak interpretation in 2021 was that TSMC wanted to make Intel dependent. That reading is too narrow. The better interpretation is that TSMC wanted every major chip designer to treat TSMC as the safest manufacturing default. Intel matters, but the bigger TSMC goal is broader: make every AI, CPU, GPU, mobile, networking, and custom ASIC team believe that the lowest execution risk is TSMC. Once that belief exists, TSMC's pricing, capacity, and roadmap power compound.
TSMC's moat is not only technology. It is customer risk reduction. The 2026 evidence, from temporary receipts to Nvidia's supply obligations to CoWoS roadmaps, all points in the same direction.
Unequal customer terms; Intel angle
TSMC wanted to make Intel product teams comfortable with external manufacturing and treated customers differently, with Apple privileged, AMD and MediaTek preferred, Nvidia and Qualcomm opportunistic, and Broadcom diversified.
Allocation layer for AI compute
TSMC became the allocation layer for advanced AI compute across wafers, CoWoS, SoIC, HBM integration, packaging slots, yield-learning windows, and multi-year capacity commitments. The Intel angle remains real but sits inside a broader AI-driven framework.
SemiAnalysis explains TSMC's unequal customer terms and Intel strategy
The article maps Apple, AMD, MediaTek, Nvidia, Qualcomm, Broadcom and Intel as distinct customer archetypes[1].
TSMC temporary receipts show capacity-retention payments
Q3 2021 filing makes the financialization of capacity access visible on the balance sheet[1].
N3 ramps with more customer diversity than N5
The leading-edge mix broadens beyond Apple-first ramps into HPC and custom silicon.
AI/HPC becomes the center of TSMC growth
HPC rises from 43% (2023) to 51% (2024) to 58% (2025) of TSMC net revenue[2].
TSMC HPC reaches 58% of revenue
HPC revenue NT$2.193T, up 48% YoY. Advanced-node mix at 74% of wafer revenue[2].
Temporary receipts remain a major capacity-reservation line item
NT$189.858B at year-end 2025: NT$146.559B current, NT$43.299B noncurrent[2].
TSMC capex planned at US$52B to US$56B
Primarily 2 nm and 3 nm capacity expansion across Fab 20, Fab 21 and Fab 22 with advanced packaging build-out[2].
Nvidia discloses $95.2B outstanding inventory and long-term supply/capacity obligations
Premiums, deposits, and long-term supply and capacity agreements; substantially all paid through FY2027[3].
TSMC produces 5.5-reticle CoWoS and outlines 14-reticle CoWoS for 2028
Package-scale AI systems become the unit of allocation, not just wafer starts[4].
14-reticle CoWoS planned with ~10 compute dies and 20 HBM stacks
Allocation expands from one die plus HBM to package-scale heterogeneous compute[4].
A14-to-A14 SoIC and beyond-14-reticle packaging roadmap
SoIC at 1.8x higher die-to-die IO density vs N2-on-N2; CoWoS expected to extend further[4].
Section 15 Risks and limits
The argument above blends 2021 history, TSMC filings, Nvidia disclosures, Intel statements, and ASML demand context. It is worth being explicit about where the case can break.
TSMC does not publicly name all customers in its revenue concentration table; specific shares should not be inferred.
Temporary receipts show capacity-retention payments but do not reveal every customer or full contract terms.
Nvidia's $95.2B obligations include more than pure TSMC wafer commitments and should not be treated as a TSMC-only number.
CoWoS capacity is only one part of the AI supply chain; HBM, substrates, assembly, test, power, cooling and networking are separate bottlenecks.
Intel 18A could reduce Intel's reliance on TSMC if it executes well; the dependency story is not one-way.
Samsung, Intel Foundry, and others can still compete in specific areas; TSMC dominance is not uniform across segments.
Geopolitical risk around Taiwan remains material to any TSMC-centric thesis.
Company roadmap targets (CoWoS reticle sizes, SoIC nodes, A14 timing) are not guaranteed outcomes.
AI demand can soften or reshape; the allocation pressure depends on demand persistence.
This essay is industry analysis, not investment advice; customer leverage shifts with each generation of product, process, and packaging.
The point is not that TSMC controls everything. The point is that it sits at the narrowest point of the advanced compute supply chain.
Section 16 Final verdict
The 2021 article was right. TSMC's power was never only about selling wafers. It came from unequal terms, preferred customers, PDK integration, capacity commitments, and customer trust. In 2026, that power is larger because AI made advanced compute capacity scarce. TSMC now allocates the key ingredients of AI hardware: advanced wafers, CoWoS, SoIC, HBM integration, yield learning, PDK maturity, packaging slots, and roadmap timing.
Intel remains the most interesting strategic case. Nvidia shows the new urgency. Apple shows the old privileged model. AMD and MediaTek show alignment. Qualcomm shows optionality's price. Broadcom shows custom silicon's pull.
Everyone can call TSMC their foundry. Not everyone gets the same seat at the table.
Section 17 Evidence ledger and source notes
| Source | Claim | Why it matters |
|---|---|---|
| SemiAnalysis (2021) | Apple anchor PDK partner; AMD and MediaTek preferred; Nvidia and Qualcomm opportunistic; Broadcom diversified; Intel as strategic prize. | Anchors the historical customer-terms framework. |
| TSMC 2025 Form 20-F | HPC 58% of FY2025 revenue (NT$2.193T, +48% YoY); 3 nm 24%, 5 nm 36%, 7 nm 14% (74% at 7 nm and below); temporary receipts NT$189.858B; 2026 capex US$52-56B. | Quantifies the AI/HPC center of gravity and capacity reservation lines. |
| Nvidia FY2026 10-K | $95.2B outstanding inventory and long-term supply/capacity obligations; substantially paid through FY2027; premiums, deposits and capacity commitments to secure supply. | Quantifies how AI demand turned supply agreements into strategic weapons. |
| TSMC 2026 Symposium | 5.5-reticle CoWoS today; 14-reticle CoWoS by 2028 with ~10 compute dies and 20 HBM stacks; A14-to-A14 SoIC 2029; COUPE in 2026. | Defines the package-scale allocation layer. |
| Intel Panther Lake / 18A | Panther Lake first 18A client SoC in production; Fab 52 ramping to HVM on 18A. | Shows Intel attempting to reduce dependency on TSMC. |
| Lip-Bu Tan reset memo | 14A investment tied to confirmed customer commitments; "no more blank checks". | Frames Intel's foundry economics test. |
| ASML Q4 2025 | Q4 net bookings EUR 13.2B; EUV bookings EUR 7.4B; backlog EUR 38.8B; positive medium-term view mainly because of AI-related demand. | Macro evidence that the equipment stack is being pulled by AI. |
Footnotes & sources
- SemiAnalysis, “TSMC Wants To Make Intel Dependent On External Manufacturing — Wafer Supply Agreement Insights For AMD, Apple, Broadcom, Intel, MediaTek, Nvidia, and Qualcomm,” 2021 (PDF supplied by author). Source for the customer-terms taxonomy: Apple anchor and PDK partner; AMD and MediaTek preferred; Nvidia and Qualcomm opportunistic; Broadcom diversified; Intel as strategic prize; Nvidia $1.64B advance payments and $1.79B planned; Qualcomm ~$13B purchase obligations; and the Q3 2021 TSMC filing showing temporary receipts to retain capacity.
- TSMC, “2025 Form 20-F,” investor.tsmc.com/…/2025_20F Report. Source for HPC at 58% of FY2025 revenue with NT$2.193T and +48% YoY growth, smartphone at 29%, the 24%/36%/14% mix at 3 nm / 5 nm / 7 nm with 74% at 7 nm and below, temporary receipts of NT$189.858B at year-end 2025 (NT$146.559B current, NT$43.299B noncurrent), and 2026 capex of US$52-56B focused on 2 nm and 3 nm capacity expansion and advanced packaging.
- Nvidia, “Form 10-K (Fiscal Year 2026),” sec.gov/…/nvda-20260125. Source for Nvidia's use of TSMC and Samsung as foundries, the description of premiums, deposits, long-term supply agreements and capacity commitments, the $95.2B outstanding inventory purchase and long-term supply and capacity obligations as of January 25, 2026, and the statement that substantially all such commitments are expected to be paid through fiscal year 2027.
- TSMC, “TSMC 2026 Technology Symposium,” pr.tsmc.com/english/news/3302. Source for 5.5-reticle CoWoS in production, 14-reticle CoWoS planned by 2028 with around 10 compute dies and 20 HBM stacks, expansion beyond 14 reticles in 2029, A14-to-A14 SoIC production availability in 2029 at 1.8x higher die-to-die IO density vs N2-on-N2 SoIC, and COUPE co-packaged optics on substrate beginning production in 2026 with 2x power efficiency and 10x latency reduction vs pluggable versions.
- Intel Newsroom, “Intel Unveils Panther Lake Architecture — First AI PC Platform Built on 18A,” newsroom.intel.com. Source for Panther Lake as the first client SoC built on Intel 18A and the production status, and the framing of Fab 52 in Arizona ramping to high-volume 18A manufacturing.
- Intel Newsroom, Lip-Bu Tan, “Steps in the Right Direction,” newsroom.intel.com/corporate/lip-bu-tan-steps-in-the-right-direction. Source for the 14A-tied-to-customer-commitments policy and the no-more-blank-checks language used in the Intel section.
- ASML, “Q4 2025 Financial Results,” asml.com/…/q4-2025-financial-results. Source for Q4 2025 net bookings of EUR 13.2B, EUV bookings of EUR 7.4B, the end-2025 backlog of EUR 38.8B, and the customer commentary on a more positive medium-term assessment driven mainly by AI-related demand.