The Fab That Outlived 3D XPoint.Original analysisNot investment advice
3D XPoint was the dream: a new memory tier between DRAM and NAND. Lehi was the asset. The dream failed because the ecosystem and economics never lined up. The asset survived because TI could turn it into something more boring and more durable: low-cost 300mm capacity for analog and embedded chips.
In 2021, Micron sold a fab. But the deeper story was not the transaction. It was the death of one semiconductor dream and the second life of a manufacturing asset.
The uploaded SemiAnalysis article covered Micron’s sale of the Lehi, Utah fab to Texas Instruments. Micron said the deal was worth $1.5B. TI said the cash purchase price was $900M. The difference came from tools and other assets Micron retained.1
At the time, Lehi was associated with 3D XPoint, the non-volatile memory technology created through the Intel/Micron partnership. It was supposed to become a new layer between DRAM and NAND. Faster than NAND. Denser than DRAM. Persistent. Enterprise-grade. Potentially architecture-changing. But by 2021, Micron had moved on.2
The memory technology failed. The fab did not.
Micron’s Lehi fab shows the difference between a technology thesis and a manufacturing thesis. 3D XPoint needed an ecosystem that never arrived. TI needed 300mm capacity for analog and embedded products with long lives, broad demand, and cost advantages. In 2026, the fab’s second life looks more durable than its first.
I. The 2021 thesis
In July 2021, Dylan Patel published a SemiAnalysis piece on Micron’s sale of Lehi to Texas Instruments. The piece walked through the deal mechanics, the IMFT joint venture history with Intel, the fab’s use for 3D XPoint and some NAND operations, the underutilisation pressure on Micron, and TI’s plan to refit the site for 65nm and 45nm analog and embedded processing, with TI not receiving 3D XPoint IP or licensing rights and expecting underutilisation costs through conversion before first revenue around early 2023.1
Five years on, the structural argument has held up. The 3D XPoint story is over. The Lehi story is just starting.
Micron was exiting a stranded 3D XPoint manufacturing asset. TI was buying 300mm capacity that could be refit for analog and embedded chips with long product lives and better economics.
II. 3D XPoint was the wrong kind of hard
3D XPoint was technically interesting, but semiconductors do not win because they are interesting. They win when the whole stack lines up: manufacturing scale, cost curve, customer demand, platform support, software adoption, system architecture, procurement confidence, replacement cycle, ecosystem incentives.
3D XPoint was a non-volatile memory technology that aimed to sit between DRAM and NAND — faster than NAND, persistent, and meant to create a new memory/storage tier.
But the position was hard. It was not cheap enough to displace NAND broadly. It was not simple enough to displace DRAM. It needed system-level adoption, platform support, and software changes that did not arrive at sufficient scale.
In 2021, Micron said it would cease 3D XPoint development immediately and redirect resources toward CXL-enabled memory products, citing insufficient market validation to justify the investment needed for commercialisation at scale.2
A new memory tier is not just a chip. It is a platform transition.
III. Intel ending Optane closed the loop
The other half of the 3D XPoint story was Intel’s Optane product family. Intel later said it would cease future development of Optane products, describing Optane as having become impractical to deliver at necessary scale as a single-source supplier.4
That confirms the broader problem. 3D XPoint did not fail because the idea was boring. It failed because the ecosystem and economics were not strong enough.
3D XPoint needed the industry to change around it. The industry did not move fast enough.
IV. TI bought the boring part on purpose
The 2021 SemiAnalysis piece was clear that TI did not receive 3D XPoint IP or licensing rights, planned to use the fab for 65nm and 45nm analog and embedded processing, offered Micron Lehi employees the opportunity to become TI employees, and expected underutilisation costs during conversion.1 TI’s own announcement framed Lehi as its fourth 300mm wafer fab and an extension of its 300mm manufacturing capacity at a $900M cash price.3
TI was not buying failed memory technology. TI was buying a manufacturing asset that fit its analog and embedded playbook.
The dream
- Goal · create a new memory tier between DRAM and NAND.
- Needs · ecosystem, software, platform adoption.
- Reality · insufficient market validation.2
- Result · cease development; sell the fab.
Micron sold a failed memory asset. TI bought a future analog cost advantage.
V. Why analog and embedded are different
Analog and embedded chips do not chase Moore’s Law the same way CPUs and GPUs do. They live in cars, factories, data centres, medical devices, industrial robots, power systems, communications equipment, consumer electronics, and defence and aerospace systems. They often need long product lives, reliability, supply continuity, cost discipline, process maturity, manufacturing control, and qualification stability.
In analog, boring is not a weakness. Boring is the business model.
VI. Lehi became LFAB1
In the years after the deal, Lehi became LFAB1. TI’s CHIPS Act funding fact sheet describes LFAB1 as producing analog and embedded processing chips on 45nm and 65nm process technologies, with 28nm technology in development. LFAB2 is being built next to LFAB1 on the same Lehi site.5
The same fab that could not justify a new memory ecosystem became part of TI’s 300mm analog machine.
VII. The 300mm cost advantage
TI’s annual report describes the structural cost story plainly. TI says an unpackaged chip built on a 300mm wafer costs about 40% less than one built on a 200mm wafer, with internal manufacturing, process technology, and packaging helping lower costs and increase supply-chain control.6
A 300mm wafer has more surface area than a 200mm wafer. More chips can be produced per wafer. For mature analog and embedded products with long lives, that cost structure can matter for decades.
200mm wafer
Smaller surface area. Fewer die per wafer. Higher unit cost for the same product.
300mm wafer
More die per wafer. Lower unit cost for analog and embedded products with long lives.
~40% lower unit cost · TI claim6TI is not using 300mm to chase the bleeding edge. TI is using 300mm to make foundational chips cheaper, more available, and more controllable.
VIII. The AI-era twist: foundational chips matter more, not less
When people talk about AI infrastructure, they usually talk about GPUs, HBM, CoWoS, networking, power, and cooling. But every AI factory also needs foundational semiconductors: power management, voltage regulation, current sensing, isolation, precision data converters, timing, embedded controllers, thermal management, motor control, battery management, data-center power delivery, and networking support chips.
PMICs & VRMs
Converters
Clocks & isolation
MCUs
TI’s 2026 Capital Management materials describe industrial, automotive, and data-centre markets as the long-term growth engine for the company’s analog and embedded portfolio.7 AI accelerators sit on top of a much larger electrical system, and the analog and embedded chips inside that system are exactly what 300mm fabs like Lehi are designed to produce at scale.
The AI factory is not only an accelerator rack. It is an electrical system. TI sells into the electrical system.
IX. From failed memory fab to U.S. supply-chain asset
TI announced plans to invest more than $60B across seven U.S. semiconductor fabs in Texas and Utah, framing the investment around foundational semiconductors and U.S.-made chip supply.8 TI’s Lehi manufacturing page describes Lehi as the home of LFAB1 and LFAB2, expected at full production to make tens of millions of analog and embedded chips per day.9
The fab did not become more valuable because it became more advanced. It became more valuable because it became more useful.
X. Why CXL replaced the dream better than XPoint did
Micron’s 2021 portfolio update redirected resources toward CXL-enabled memory products.2 CXL expands and pools memory using a standards-based interconnect. Instead of forcing the world to adopt a new memory tier with a new device-economics problem, CXL fits into the data-center architecture more naturally.
CXL is not a one-to-one replacement for 3D XPoint.
CXL did not solve everything 3D XPoint was trying to solve, and it is still maturing. The point is that Micron’s pivot showed the industry’s preferred direction: memory expansion through platform standards rather than a proprietary stranded media layer.
3D XPoint tried to create a new tier. CXL tried to make memory expansion fit the platform.
XI. The two semiconductor lessons
Strip away the specifics and Lehi tells a simple story about two ways to win in semiconductors.
3D XPoint
- New device · new physics, new performance tier.
- New ecosystem · platforms, software, customers.
- High risk · fails if the platform does not move.
- Outcome · cease development.2
The memory was more exciting. The fab was more durable.
XII. What could break the thesis?
TI may be right about 300mm long-term and still suffer if it builds capacity faster than demand arrives.
- Capital intensity. The 300mm buildout is enormous on TI’s balance sheet.8
- Cyclicality. Analog demand is cyclical across industrial and auto.
- Inventory. Customers overordered during shortages and then burned inventory.
- Underutilisation. Underabsorbed capacity pressures gross margin.6
- China competition. Lower-end analog faces real pricing pressure.
- Industrial recovery. Industrial cycles can be slow to turn.
- Automotive demand. EV and ICE mix shifts can be choppy.
- Data-center mix. Not every analog socket becomes high-margin forever.
- Overbuild. Capacity ahead of demand pressures returns.
- Capex scrutiny. Investors may pressure TI on capex and free cash flow.
XIII. What could break the bear case?
If electronics keep spreading through the physical world, low-cost internal 300mm analog capacity becomes a structural advantage.
- Vehicle content. Electronics content per car keeps increasing.
- Factories and robots. Industrial automation needs more sensing and control.
- AI data centers. Power management and protection scale with accelerator capex.
- Medical and energy. Reliable analog is required at the device level.
- U.S. manufacturing. Domestic, dependable supply gains strategic value.8
- 300mm structural cost. The 200mm vs 300mm gap is durable.6
- Long lives. Mature 300mm capacity stays valuable for decades.
- Internal control. Owned manufacturing lowers exposure to external pricing.
If electronics keep spreading through the physical world, low-cost internal 300mm analog capacity becomes a structural advantage.
XIV. What to watch
- LFAB1 production ramp.
- LFAB2 construction and ramp.5
- TI 300mm utilisation.
- 28nm development at Lehi.5
- TI capex trajectory.
- Free cash flow recovery.
- Industrial demand recovery.
- Automotive demand mix.
- Data-center power exposure.
- Analog pricing pressure.
- China analog competition.
- Internal manufacturing percentage.
- Customer inventory digestion.
- U.S. CHIPS Act support and disbursement.5
- Sherman and Richardson fab ramps.
- 300mm cost advantage in gross margin.6
Glossary
A short reference for the vocabulary used above. Definitions are simplified.
- 3D XPoint
- Non-volatile memory technology created by Intel and Micron.
- Optane
- Intel’s product family based on 3D XPoint.
- NAND
- Non-volatile flash storage used in SSDs.
- DRAM
- Volatile memory used as main system memory.
- CXL
- Compute Express Link — a standard for connecting processors, memory, and accelerators.
- Fab
- Semiconductor fabrication facility.
- 300mm wafer
- Larger wafer size that produces more chips per wafer.
- 200mm wafer
- Older smaller wafer size.
- Analog chip
- Chip that processes real-world continuous signals such as voltage, current, sound, light, or temperature.
- Embedded processing
- Microcontrollers and processors used inside products and systems.
- Foundational semiconductors
- Mature but critical chips used broadly across electronics.
- Underutilisation
- When a fab is not running enough volume to absorb its fixed costs.
- LFAB1
- TI’s Lehi fab acquired from Micron.
- LFAB2
- TI’s second Lehi fab under construction.
XV. The fab that outlived 3D XPoint
3D XPoint was the dream. A new memory tier between DRAM and NAND.
Lehi was the asset.
The dream failed because the ecosystem and economics never lined up. The asset survived because TI could turn it into something more boring and more durable: low-cost 300mm capacity for analog and embedded chips.
The lesson is not that Micron made a bad sale or that TI got lucky. The lesson is that semiconductors have two ways to win. A technology thesis can change the architecture of computing when the ecosystem moves with it. A manufacturing thesis can quietly compound for decades when the cost curve and the demand are real. The same building can host both stories on different timelines.
The 3D XPoint chapter is over. The Lehi chapter has just started.
And as AI infrastructure scales, the boring chips that surround every accelerator — the power, sensing, timing, and control silicon that lives in industrial systems, automotive platforms, and data-centre power delivery — matter more, not less. That is the world LFAB1 is built for.
That is why the fab outlived 3D XPoint.
1 Patel, D. (Jul 2021). Micron Sells 3D X-Point Lehi, Utah Fab to Texas Instruments For $1.5B. SemiAnalysis. Historical anchor for the deal framing, including the $1.5B Micron headline value, $900M TI cash price, $600M tools/assets retained by Micron, IMFT joint venture history, 3D XPoint and NAND operations at the fab, Intel’s 3D XPoint supply relationship, TI not receiving 3D XPoint IP or licensing, plans to refit the fab for 65nm and 45nm analog and embedded processing, expected underutilisation costs during conversion, and first revenue expected in early 2023. Used as inspiration only. No content, structure, or charts reproduced.
2 Micron Technology (2021). Micron updates data center portfolio strategy. Cessation of 3D XPoint development, sale of the Lehi fab, redirection toward CXL-enabled memory products, and insufficient market validation framing.
3 Texas Instruments (2021). TI to acquire Micron 300mm semiconductor factory. $900M cash acquisition price, Lehi as TI’s fourth 300mm wafer fab, and extension of TI’s 300mm manufacturing capacity.
4 Intel. Intel Optane business update. Intel statement on ceasing future development of Optane products, with single-source-supplier scale challenges framing.
5 Texas Instruments. CHIPS Act funding for TI fact sheet. LFAB1 producing analog and embedded processing chips on 45nm and 65nm process technologies, 28nm in development, LFAB2 connected to LFAB1, and U.S. CHIPS Act manufacturing context.
6 Texas Instruments. TI 2025 Annual Report. 300mm vs 200mm unpackaged-chip cost roughly 40% lower, internal manufacturing and process technology framing, and supply-chain control positioning.
7 Texas Instruments. TI 2026 Capital Management presentation. Industrial, automotive, and data-centre growth framing, revenue mix context, and capex / free cash flow positioning.
8 Texas Instruments. TI plans to invest more than $60B in U.S. manufacturing. More than $60B planned investment across seven U.S. semiconductor fabs in Texas and Utah, framed around foundational semiconductors.
9 Texas Instruments. TI Lehi manufacturing page. LFAB1 and LFAB2 site details, at-full-production output framed in tens of millions of analog and embedded processing chips per day.
- The Boring Back-End Boom. Mature nodes, wirebonding, and packaging becoming strategic again.
- The Other Leading Edge. GlobalFoundries and the specialty foundry layer of AI infrastructure.
- The Foundry Toll Road. Why TSMC’s pricing power got stronger in the AI era.
- The GAA Credibility Test. Samsung Foundry’s 2nm comeback as a trust test, not a transistor story.
- The AI Memory Tax. AI servers repricing DRAM, NAND, and consumer electronics.
- The AI Memory Wall. DRAM, HBM, packaging, and semicap as the new centre of computing.
- The Density Illusion. Why Moore’s Law became a system problem.
- The Custom Silicon Flywheel. Hyperscalers turning their biggest workloads into chips.
- Nvidia Built the AI Factory Anyway. Vertical system integration as the new moat.
- Nvidia’s Earnings Quality Test. AI capex, customer concentration, and durability of revenue.
- The Wafer-Scale Latency Bet. Cerebras and the case for removing chip boundaries.
- The AI Field Manual. Reference layer for the AI stack: hardware, memory, models, agents, safety, economics.
This is Essay No. 031. The topics: intelligence, AI, systems, knowledge, and the questions underneath the questions everyone else is asking. If you read this far and disagreed with any part of it, write to me. I read everything.