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Essay No. 029  ·  AI Infrastructure  ·  Melbourne, Australia
AI Infrastructure Samsung Foundry GAA MBCFET SF2 2nm TSMC Foundry HBM Advanced Packaging Backside Power CoWoS ASML

The GAA Credibility Test.Original analysisNot investment advice

Why Samsung Foundry’s 2nm comeback is about trust, not transistor marketing.
PM
Pugalenthi Magendran
April 2026  ·  Melbourne, Australia
12 min read

Samsung was early to gate-all-around, but being first was not enough. The real test is whether Samsung can turn GAA into a trusted, high-yield, high-volume foundry platform for AI, HPC, mobile, automotive, HBM base-die, and advanced-packaging customers. SF2 is not just another node. It is Samsung Foundry’s credibility test.

In 2021, Samsung wanted to be first. Not first to another FinFET node. First to gate-all-around.

That mattered because transistor architecture changes are rare. Intel’s move from planar transistors to FinFET at 22nm defined an era. Samsung wanted the same kind of moment with MBCFET, its nanosheet version of gate-all-around.

The uploaded SemiAnalysis article was skeptical. It argued that Samsung’s 3nm GAA story looked delayed, overmarketed, and unlikely to become a real commercial foundry reset on the original timeline.1

The warning was simple. Samsung might be first to GAA. But first does not automatically mean trusted.

In 2026, that warning is the whole story.

Samsung did reach GAA production before TSMC. But the foundry market did not suddenly reset. TSMC kept the strongest customer trust, the largest advanced-node ecosystem, and the deepest AI packaging momentum.8

Now Samsung’s question is bigger than 3GAE. The question is SF2. Can Samsung turn GAA into a real AI-era foundry platform?

Key idea

The correct thesis is not “Samsung beat TSMC because it reached GAA first.” The correct thesis is that Samsung was early to gate-all-around, but the first GAA headline did not solve the foundry trust problem. In 2026, SF2 is Samsung Foundry’s credibility test. If Samsung can combine mature GAA, competitive yield, HBM/base-die integration, advanced packaging, silicon photonics, and real AI/HPC customer wins, it becomes the most important alternative to TSMC. If not, GAA remains a technical milestone that failed to become a foundry reset.


I. The 2021 thesis

In June 2021, Dylan Patel published a SemiAnalysis piece on Samsung Foundry’s 3nm GAA process, 3GAE. The piece explained the industry transition from planar to FinFET to gate-all-around, then walked through Samsung’s original 3GAE claims of 35% performance improvement, 50% power reduction, and 45% area reduction versus 7nm, alongside revised claims of 10% performance, 20% power, and 25% area. The article saw 4LPP being inserted into the roadmap as evidence of delay pressure, quoted Qualcomm’s Dr. Chidi Chidambaram suggesting 2024 production was reasonable, and argued that “first to GAA” did not automatically equal commercial foundry leadership.1

Five years later, the technology question is settled. The credibility question is not.

2021 thesis

Samsung could be first to gate-all-around, but the bigger question was whether 3GAE would become a trusted commercial foundry node on the promised timeline.

Diagram · Samsung 3GAE original claims vs revised claims (vs 7nm)
Dimension
Original claim
Revised claim
Performance
+35%
+10%
Power
−50%
−20%
Area
−45%
−25%
Original 3GAE vs revised PPA numbers, both versus 7nm, as discussed in the 2021 SemiAnalysis piece. A simplified, original visual; not a Samsung or SemiAnalysis chart.1

II. What gate-all-around actually changes

A planar transistor has the gate on one side of the channel. A FinFET raises the channel into a fin so the gate controls multiple sides. A gate-all-around transistor wraps the gate around the channel more completely. Samsung’s MBCFET is a nanosheet version of GAA.

The benefits are real. Better electrostatic control. Lower leakage. Better power scaling. More flexible channel width. A possible long-term scaling path beyond FinFET. But the cost is real too. GAA is harder to manufacture, needs new process steps, new yield learning, new design rules, new libraries, and new customer validation.

Diagram · Planar → FinFET → nanosheet GAA
Era 01

Planar FET

Flat channel. Gate on one side. Hit short-channel limits at small geometries.

Era 02

FinFET

Channel as a raised fin. Gate wraps three sides. Dominant for ~22nm down to 3nm-class.

Era 03

Nanosheet GAA

Stacked nanosheet channels. Gate wraps all sides. Samsung’s MBCFET is one version.1

A schematic, original visual of the three transistor eras. The fin and sheet glyphs are stylised, not to scale; they are not Samsung or SemiAnalysis figures.

A new transistor structure is not a foundry business by itself. It becomes a foundry business only when customers can trust it at volume.


III. Being first was real. It was not enough.

In June 2022, Samsung announced initial production of its 3nm process using GAA architecture, claiming up to 45% lower power, 23% better performance, and 16% smaller area versus its 5nm process. The framing is Samsung’s, not independent benchmarking.2

That was a real milestone. Samsung reached GAA before TSMC. The 2021 SemiAnalysis prediction that 3GAE would slip toward 2024 turned out to be too pessimistic on timing for headline production, even if the spirit of the warning — that headline production is not commercial leadership — aged better.1

External foundry adoption did not suddenly shift. Customers still cared about yield, PDK stability, IP libraries, and trust. TSMC remained the preferred leading-edge foundry for most high-value AI/HPC silicon.8

Diagram · First to GAA vs trusted at volume
First to GAA

What Samsung achieved in 2022

  • Milestone · initial 3nm GAA production ahead of TSMC.2
  • PR value · transistor-architecture leadership claim.
  • Internal validation · viable test vehicles for the family.
  • Limit · headline production is not the same as production-grade trust at scale.
Trusted at volume

What the market actually pays for

  • Yield · consistent, transparent, and improving.
  • PDK · stable, well-supported, and trusted by IP vendors.
  • Packaging · advanced packaging tied to the node.
  • Roadmap · consistent execution, not just announcements.
A simplified, original split. Headline production was real. Trust at volume is a different test.

Samsung had the first GAA headline. TSMC still had the stronger execution reputation.


IV. The 2026 question is SF2

Samsung’s 4Q 2025 earnings materials say the Foundry business commenced mass production of first-generation 2nm products and began initial shipments of 4nm HBM base-die products, with 2026 foundry growth expected to come from advanced nodes and integration of logic, memory, and advanced packaging.4 Samsung’s Q1 2026 release adds that the Foundry business maintained HPC-focused design wins and established a silicon photonics foundation.5

Reading the claims

These are Samsung statements, not independent verification.

“Mass production” in vendor language can mean very different things across nodes. PPA claims, base-die shipments, design wins, and yield commentary are reported by Samsung, not by independent foundry analysts. Treat them as direction, not as audited proof.

The right question is not whether Samsung started 2nm. The right question is whether customers will trust Samsung 2nm with important AI, HPC, mobile, and automotive chips.


V. TSMC changed the standard

Samsung is not competing against a stationary target. TSMC’s 2025 Annual Report and 2026 North America Technology Symposium describe N2P and A16 in volume production in the second half of 2026, with A13 for 2029, A12 previewed with Super Power Rail backside power for AI/HPC, N2U targeted for production in 2028, plus CoWoS expansion (5.5-reticle today, 14-reticle by 2028), SoIC for 3D logic-on-logic stacking, InFO, and COUPE for silicon photonics.89

Diagram · The TSMC standard Samsung is being compared to
01
N2 in HVM 2nm production from Q4 20259
Logic node
02
N2P + A16 volume production in H2 20269
Logic node
03
A13 + A12 (preview) A12 with Super Power Rail backside power for AI/HPC9
Logic node
04
CoWoS 5.5-reticle today, 14-reticle by 20289
Packaging
05
SoIC + COUPE 3D stacking and optical I/O
System
A simplified, original visual based on TSMC’s public 2025 Annual Report and 2026 symposium materials. Not a TSMC chart.89

The AI-era foundry fight is not “who said nanosheet first?” It is who can manufacture the full AI silicon stack at trusted volume.


VI. AI makes the foundry fight bigger than logic

ASML’s 2025 Annual Report describes AI as requiring leading-edge high-performance processors and a significant increase in DRAM compared with traditional compute architectures, with strong AI growth enabled by advanced Logic and AI-related DRAM.10

That changes what a foundry must offer. AI chips need more than logic nodes. They need HBM, base dies, advanced packaging, high-bandwidth interconnect, power delivery, thermal management, test, yield, and supply-chain coordination across all of the above.

Samsung’s foundry comeback has to be bigger than “we have GAA.” It has to be “we can build the AI silicon system.”


VII. Samsung’s real strategic angle is vertical integration

At SFF 2024, Samsung framed its AI-era foundry strategy around combining Foundry, Memory, and Advanced Package businesses, with SF2Z described as a 2nm variant with backside power delivery for HPC and planned for mass production in 2027.6 Samsung’s 2021 foundry roadmap also pointed at 2nm MBCFET as a future production node, with AI/ML and connected-device framing.3

Samsung has assets TSMC does not have in the same way: memory, foundry, advanced packaging, HBM, base dies, photonics direction, consumer and mobile products, and large capex capacity. But vertical integration only matters if customers trust each layer.

Diagram · Samsung integrated AI manufacturing stack
SF2 logic
2nm GAA family4
HBM + base die
4nm base-die shipments4
Advanced packaging
Samsung AVP framing6
Backside power
SF2Z HPC variant6
Photonics / interconnect
Silicon photonics foundation5
A simplified, original map of Samsung’s integrated AI manufacturing surface area. Not a Samsung chart.

Vertical integration only matters if customers trust each layer.


VIII. HBM base dies are more important than they look

HBM is not only stacked DRAM. The stack sits on a base die — a logic / control die underneath the memory layers that handles interface, power, test, signal routing, and integration with the rest of the package. Samsung’s reported initial shipments of 4nm HBM base-die products turn its memory strength into a touch point with its foundry strategy.4

Diagram · HBM stack and base die, simplified
DRAM die
DRAM die
DRAM die
DRAM die
TSV interconnect
Base die (foundry logic)
DRAM stacked above. Logic base die below. Samsung says it shipped initial 4nm HBM base-die products.4
A schematic, original visual. Layer counts and proportions are stylised, not literal HBM geometry.

The HBM base die is where Samsung’s memory story starts touching its foundry story.


IX. Silicon photonics and advanced packaging are the new foundry battlegrounds

The foundry battle is shifting from node-only competition toward system-level manufacturing. Samsung’s Q1 2026 release calls out the establishment of a silicon photonics foundation, and the 4Q 2025 materials describe AI-era growth tied to advanced nodes plus integration of logic, memory, and advanced packaging.45 Samsung’s SFF 2024 framing wraps these strands together under an “AI-era vision” positioning.6

The next foundry competition is not just 2nm versus 2nm. It is package versus package, memory integration versus memory integration, and interconnect stack versus interconnect stack.


X. Customer trust is the core problem

Foundry trust means customers believe the node will ramp on time, yield will be acceptable, PDKs will stabilise, IP libraries will work, EDA flows will be mature, packaging will be ready, support will be strong, roadmap promises will not slip, external customers will not be treated as secondary to internal products, confidential designs will be protected, and capacity will be available when needed.

Diagram · What “foundry trust” actually means
01
Yield
Stable and improving with transparency.
02
PDK
Mature, supported, and EDA-aligned.
03
IP libraries
Standard cells, SerDes, memory IP ready.
04
Packaging
Co-developed with the node, not afterthought.
05
Capacity
Wafer starts and packaging slots available.
06
Confidentiality
Customer designs ringfenced from internal products.
07
Roadmap
Public commitments that hit on time.
08
Support
Application engineering you can call at 3am.
09
Repeat usage
Customers come back for the next generation.
A simplified, original checklist. Foundry trust is built across all nine, not just on transistor architecture.

Foundry trust is built over years, not announced at a forum.


XI. The Tesla / Qualcomm / AI-HPC signal

Samsung’s SAFE Forum 2026 page positions the event under a “Silicon Intelligence” theme with HPC, AI, and automotive design enablement at the centre, with a customer-facing speaker line-up.7 Conference participation is a target-market signal, not a production-win signal.

Reading the forum

Forum appearances and customer discussions are signals. Production ramps are proof.

Until verified reporting confirms specific Tesla, Qualcomm, or AI/HPC design wins at SF2 with shipping volumes and timelines, the safer read is that Samsung is showing the market it wants to compete for these workloads, not that it has already won them.


XII. Where Samsung can win

Samsung does not need to replace TSMC. It needs to become the alternative customers can trust. A useful strategic framing is the set of positions where Samsung has structural advantages it can press.

Where Samsung can plausibly win
  1. Advanced-node alternative. A credible second source to TSMC for customers who refuse single-vendor risk.
  2. Logic + memory + packaging. An integrated AI-system manufacturing partner.6
  3. HBM base-die supplier. Connecting memory leadership to foundry value via the base die.4
  4. Geopolitical diversification. Foundry footprint outside Taiwan.
  5. Automotive and mobile AI. Power-efficient, integrated foundry partner.
  6. Second source. The companies that cannot rely on one foundry forever.

Samsung does not need to replace TSMC. It needs to become the alternative customers can trust.


XIII. What could break the thesis?

The strongest bear case is that Samsung has good technology, but customers trust TSMC’s execution more.

Bear case · what could break the thesis
  1. Tech without trust. Samsung improves technically but still loses the highest-value AI designs to TSMC.8
  2. Leverage tool. Customers use Samsung mostly as pricing leverage on TSMC, not as a real second source.
  3. Internal vs external yield. Yields that work for Samsung’s own products do not always translate to external HPC.
  4. TSMC roadmap extends. N2 / N2P / A16 / A13 / A12 / CoWoS / SoIC / COUPE keep widening the lead.9
  5. Intel Foundry rises. A stronger alternative for U.S.-aligned workloads pulls some of Samsung’s second-source demand.
  6. Conflict of interest. Vertical integration looks like conflict, not advantage, to fabless customers.
  7. Packaging gap. Advanced packaging lags TSMC’s ecosystem and reticle scaling.9
  8. HBM competition. Competition with SK hynix and Micron limits the integrated story.
  9. Trust takes time. Customer trust takes longer to rebuild than transistor structure.
  10. Safest supply chain. AI customers prefer the safest supply chain even at higher cost.

XIV. What could break the bear case?

AI customers need another advanced foundry, and Samsung is one of the few companies with enough technology, memory integration, packaging, and capital to matter.

Bull case · what could break the bear
  1. Alternative demand. AI customers actively want alternatives to a single supplier.
  2. Geopolitics. Second sourcing rises in strategic value.
  3. Foundry scarcity. Samsung is one of the few real advanced-foundry alternatives.
  4. Integrated stack. Logic + memory + packaging + base die is rare in one company.4
  5. SF2 maturity. SF2 could mature enough for credible external use.4
  6. Less GPU-locked workloads. Automotive and edge AI are less locked to TSMC than flagship AI GPUs.
  7. Diversification pressure. Customer pressure for supply diversification forces real adoption.
  8. Yield + enablement. If Samsung fixes yield and design enablement, the market wants a second source.
  9. Capital. Samsung’s capex capacity allows multi-year investment without flinching.

AI customers need another advanced foundry, and Samsung is one of the few companies with enough technology, memory integration, packaging, and capital to matter.


XV. Samsung vs TSMC, by dimension

A clean way to see the credibility gap is to put the two foundries side by side on the dimensions customers actually pay for.

Dimension
TSMC today
Samsung today
Advanced node
N2 in HVM, N2P / A16 in 2026.9
SF2 in mass production; SF2P / SF2Z roadmap.46
Roadmap depth
A13 by 2029, A12 with backside power preview.9
SF2Z backside power; longer-horizon roadmap less detailed publicly.6
Advanced packaging
CoWoS at 5.5R today, 14R by 2028; SoIC; InFO.9
Advanced Package business integrated under SFF strategy.6
Memory integration
External HBM partners; AI demand pulling the stack.10
Internal HBM + base-die capability; vertical option.4
Customer trust
Default AI manufacturing partner; deep ecosystem.8
Credibility-rebuilding phase; second-source role.
Photonics / optical I/O
COUPE positioning.9
Silicon photonics foundation established.5

XVI. What to watch

If the credibility test is real, certain signals will keep showing up across disclosures, conference materials, and supply-chain reporting. If it is not, the cracks will appear in the same places.

What to watch
  • SF2 production ramp pace.
  • SF2 yield commentary and transparency.
  • SF2P and SF2Z roadmap execution.6
  • Backside power delivery progress.
  • Customer tape-outs across SF2 / SF2P / SF2Z.
  • Verified AI / HPC design wins.
  • Samsung HBM base-die shipments and customer mix.4
  • HBM4 and HBM4E base-die strategy.
  • Advanced packaging capacity expansion.
  • Silicon photonics progress beyond “foundation.”5
  • SAFE ecosystem maturity, especially EDA and IP.7
  • Qualcomm, Tesla, automotive, and AI customer signals.
  • TSMC N2 / N2P / A16 ramp and competitive response.9
  • TSMC CoWoS / SoIC / COUPE expansion cadence.9
  • Intel Foundry progress on U.S.-aligned workloads.
  • Samsung customer concentration and external mix.
  • External foundry revenue trajectory.
  • Evidence of repeat customers across generations.
  • Confidentiality posture for fabless customers.
  • EUV / High-NA EUV deployment in support of SF2 family.10

Glossary

A short reference for the vocabulary used above. Definitions are simplified.

Glossary
Gate-all-around / GAA
Transistor architecture where the gate wraps around the channel for better electrostatic control.
MBCFET
Samsung’s nanosheet-style gate-all-around transistor.
FinFET
Transistor architecture using fin-shaped channels.
Planar FET
Older flat transistor architecture.
SF2
Samsung Foundry’s 2nm-class process family.
SF2P
Performance-enhanced 2nm process variant.
SF2Z
Samsung’s 2nm variant with backside power delivery, per company materials.
PDK
Process design kit; the file-and-rules package designers use to make chips on a node.
Yield
Percentage of manufactured chips that work to specification.
HBM
High-bandwidth memory used near AI accelerators.
HBM base die
Logic / control die underneath HBM memory stacks.
Advanced packaging
Methods for integrating multiple dies, memory, and interconnects into one system.
Backside power
Routing power on the back side of the wafer/chip to improve performance and efficiency.
CPO
Co-packaged optics; optical I/O integrated into the package.
Foundry trust
Customer confidence in yield, roadmap, support, confidentiality, and repeatable execution.

XVII. The GAA credibility test

Samsung was first to gate-all-around. But first was not enough.

The 2026 question is whether Samsung can turn GAA into customer trust. SF2 is not just another node. It is Samsung Foundry’s credibility test.

If Samsung can combine GAA, yield, HBM, packaging, silicon photonics, and real AI/HPC customer wins, it becomes the most important alternative to TSMC. If it cannot, GAA becomes a technical milestone rather than a foundry reset.

Foundry markets do not reward “first” by itself. They reward yield, volume, customer trust, stable PDKs, proven IP libraries, advanced packaging, HBM integration, power delivery, roadmap reliability, customer support, ecosystem confidence, confidentiality, and repeatable execution. The 2021 SemiAnalysis warning aged into the right warning. Samsung built the transistor. The harder work is the foundry.

The proof is still ahead. SF2 ramp. SF2P / SF2Z execution. Verified AI / HPC design wins. HBM base-die scale. Silicon photonics maturity. SAFE ecosystem depth. Customer repeat usage. Independent yield commentary. None of this can be announced into existence. It has to be earned, generation after generation, customer after customer.

That is the credibility test.


1 Patel, D. (Jun 2021). Samsung Foundry 3nm Gate All Around Process Node, 3GAE, Delayed To As Late As 2024. SemiAnalysis. Historical anchor for the 3GAE delay framing, including the planar → FinFET → GAA / MBCFET explanation, original 3GAE PPA claims (35% / 50% / 45%), revised PPA claims (10% / 20% / 25%), 4LPP roadmap insertion as evidence of delay pressure, the Qualcomm process-roadmap quote, and the deeper argument that “first to GAA” does not equal commercial foundry leadership. Used as inspiration only. No content, structure, or charts reproduced.

2 Samsung Electronics (Jun 2022). Samsung begins chip production using 3nm process technology with GAA architecture. Initial 3nm production using GAA, with Samsung claiming up to 45% lower power, 23% better performance, and 16% smaller area versus its 5nm process. Treated here as a vendor claim, not an independently benchmarked result.

3 Samsung Electronics (Oct 2021). Samsung Foundry innovations power the future of big data, AI/ML, and smart connected devices. 2021 Samsung Foundry roadmap, including the 3nm GAA customer-design timing, second-generation 3nm timing, 2nm MBCFET mass-production plan, and AI/ML / smart-connected-device positioning.

4 Samsung Electronics (Jan 2026). Samsung 4Q 2025 earnings presentation. Mass production of first-generation 2nm products, initial 4nm HBM base-die shipments, and 2026 foundry growth driven by advanced nodes and integration of logic, memory, and advanced packaging.

5 Samsung Electronics (Apr 2026). Samsung Electronics announces first-quarter 2026 results. Foundry business with HPC-focused design wins and the establishment of a silicon photonics foundation, plus broader advanced-node outlook.

6 Samsung Semiconductor (2024). Samsung showcases AI-era vision and latest foundry technologies at SFF 2024. AI-era foundry roadmap; SF2, SF2P, and SF2Z framing; backside power delivery; the integration of Foundry, Memory, and Advanced Package businesses; and HPC / packaging positioning.

7 Samsung Semiconductor. SAFE Forum 2026. “Silicon Intelligence” positioning, HPC / AI / automotive design enablement, and customer-facing speaker line-up. Conference participation treated as a target-market signal, not a production-win signal.

8 TSMC. 2025 Annual Report. Robust AI-related demand, advanced packaging and 3D stacking investment, and the role of advanced logic and packaging for AI/HPC.

9 TSMC (2026). 2026 North America Technology Symposium. N2 in HVM, N2P + A16 in H2 2026, A13 for 2029, A12 with Super Power Rail backside power for AI/HPC, N2U for 2028, CoWoS at 5.5 reticles today and 14 reticles by 2028, and SoIC / COUPE positioning.

10 ASML (2025). 2025 Annual Report, strategic report section. AI requires leading-edge high-performance processors and a significant increase in DRAM relative to traditional compute architectures.

Further reading
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This is Essay No. 029. The topics: intelligence, AI, systems, knowledge, and the questions underneath the questions everyone else is asking. If you read this far and disagreed with any part of it, write to me. I read everything.

Pugalenthi Magendran