The Foundry Trust Test.Original analysisNot investment advice
Intel’s foundry comeback will not be proven by logos, evaluations, or packaging wins. It will be proven by committed external wafer volume. The 2021 Amazon / Qualcomm hype showed the danger of confusing narrative with customer commitment. In 2026, Intel has real 18A progress and a serious packaging wedge, but 14A is the trust test.
In 2021, Intel wanted the market to believe its foundry comeback had already begun. Amazon. Qualcomm. More than 100 customers in the pipeline. Two wins already. Intel Foundry Services was real.
The uploaded SemiAnalysis article pushed back hard. It argued Intel was overstating the meaning of those announcements. Amazon was not a wafer-manufacturing customer; it was a packaging customer. Qualcomm was not committing a real product; it was evaluating Intel technology.1
That distinction still matters in 2026. Because foundry is not a press-release business. It is a trust business.
The 2021 criticism of Intel’s Amazon and Qualcomm “wins” aged well because packaging engagements and evaluations are not external wafer volume. In 2026, Intel has real technical progress with 18A, RibbonFET, PowerVia, and advanced packaging, but Intel Foundry is still mostly internal and still lacks significant external node customers. The decisive question is whether Intel can turn 18A proof, 14A evaluations, and packaging demand into trusted external manufacturing volume.
I. The 2021 thesis was about language inflation
In July 2021, Dylan Patel published a SemiAnalysis piece reacting to Intel Accelerate 2021. Intel framed Amazon and Qualcomm as early Intel Foundry wins, with more than 100 customers in the pipeline and two wins already. The piece argued Amazon was only a packaging customer, with Amazon-designed chips still fabricated at other foundries such as TSMC, and that Amazon’s engagement most likely covered datacenter networking, NICs, and silicon-photonics-adjacent work. The piece argued Qualcomm was an Intel 20A evaluation, not a committed product, citing Qualcomm CEO Cristiano Amon saying Qualcomm was engaged with Intel and evaluating the technology but had no specific product plan, and warning that Qualcomm could use Intel as leverage with TSMC and Samsung. The deeper conclusion was that customer logos were being used to create a foundry-comeback narrative before the real evidence existed.1
A packaging engagement and a technology evaluation are not the same as committed wafer volume. A logo is not a foundry win.
Packaging, not wafer
II. A logo is not a foundry win
A foundry “win” can mean many things. The same word covers very different commitments.
Foundry is not won through press releases. It is won through wafers.
III. Intel now admits the customer gap
The strongest 2026 update is Intel’s own filing. Intel’s 2025 Annual Report / 10-K states that nearly all Intel Foundry business currently supports internal manufacturing for Intel Products, that Intel has few external customers to date and has been unsuccessful so far in securing any significant external foundry customer for any of its nodes, and that prospects for securing a significant external customer for Intel 14A are uncertain.2
Intel’s foundry narrative moved faster than external customer commitment.
IV. 18A is progress, not victory
Intel’s 2025 Annual Report / 10-K frames Intel 18A as introducing RibbonFET gate-all-around transistors and PowerVia backside power delivery, with the node ramped into high-volume production in 2025 and expected to serve multiple future client and server CPU generations.2 That matters. It addresses Intel’s internal execution problem. But for foundry, the harder question is whether Intel can manufacture other companies’ most important chips.
18A
14A
18A is technical proof. External wafer volume is business proof.
V. RibbonFET and PowerVia, simply
RibbonFET is Intel’s gate-all-around transistor architecture: the gate surrounds the channel more fully than traditional FinFET, improving electrostatic control and scaling. PowerVia is Intel’s backside power delivery network: power routing moves to the backside of the wafer, reducing front-side congestion and improving performance / power behaviour.2
RibbonFET
Gate-all-around with stacked nanosheet channels for stronger electrostatic control.2
These are major technical steps. But customer adoption still depends on yield, design enablement, cost, ecosystem, and trust.
A great transistor is not automatically a great foundry business.
VI. The financials show the foundry burden
Intel’s own filings and prepared remarks describe a foundry segment that carries leading-edge foundry-scale costs while external foundry revenue remains small relative to total Intel Foundry revenue.234
Foundry-scale costs. Not yet foundry-scale external customers.
Specific Intel Foundry revenue, external Foundry revenue, and operating loss figures are reported in Intel’s SEC filings and earnings materials.23 This essay treats them as company disclosures, not as a basis for valuation calls. The direction matters: Intel is paying foundry-scale costs while external revenue stays small.
Intel Foundry is carrying foundry-scale costs before it has foundry-scale external customers.
VII. 14A is the real trust test
Intel’s 10-K is unusually direct on this point. Intel says 14A was designed from inception as an offering to external customers; that if Intel cannot secure a significant external customer for 14A, it may pause or discontinue 14A and successor leading-edge nodes; and that it may shift future manufacturing beyond 18A / 18A-P to third-party foundries, particularly TSMC, if 14A does not secure customer commitment.2
That is the clearest statement of the structural question. 18A proves Intel can manufacture for itself again. 14A proves whether external customers believe.
18A is Intel’s execution test. 14A is Intel’s trust test.
VIII. Test chips are encouraging. Committed volume is proof.
Reuters and other credible outlets have reported that Intel had limited committed external customer volumes for upcoming manufacturing technologies, while customers such as Nvidia and Broadcom ran manufacturing tests with Intel.5 Test chips are useful. They are not committed production volume. The 2021 pattern repeats here: evaluation is real, testing is real, and the question is whether either converts to product tape-outs at scale.
A test chip says “maybe.” A production wafer order says “yes.”
IX. TSMC is the trust benchmark
TSMC’s 2025 Annual Report describes the company as having manufactured roughly 12,682 products for 534 customers using 305 distinct process technologies, with advanced technologies at 7nm and below at 74% of wafer revenue and 3nm at roughly 24%. 2nm entered HVM in Q4 2025 with good yield, and N2P / A16 are scheduled for volume production in H2 2026.67
TSMC sells confidence. Intel is still trying to earn it.
X. Intel’s neutrality problem
TSMC does not compete directly with its customers in CPUs, GPUs, smartphone SoCs, accelerators, or networking chips. Intel does, or has. That makes foundry trust harder. Potential customers may worry about confidentiality, priority, capacity allocation, internal-product preference, roadmap conflict, customer support culture, and whether Intel can act as a neutral manufacturing partner.
Neutral manufacturing layer
Competitor + foundry
Intel is trying to become a neutral manufacturing layer while still being Intel.
XI. Packaging is Intel’s wedge
Intel’s 10-K describes packaging as central to its strategy as customers move toward disaggregated multi-die architectures, with EMIB, EMIB-T, and Foveros variants part of the offering.2 Intel’s Q1 2026 prepared remarks describe additions to the advanced-packaging services backlog and a multi-year back-end expansion in Malaysia, with committed packaging demand expected to begin converting to revenue in 2027.4
Intel may enter external foundry through the package before it wins the wafer.
XII. Why packaging matters more in AI
AI chips are no longer just single dies. They need HBM integration, chiplets, interposers, advanced substrates, thermal management, power delivery, optical I/O, high-bandwidth interconnect, and multi-die integration. TSMC’s 2026 symposium materials describe CoWoS expansion, SoIC, and COUPE co-packaged optics as the packaging surface around its advanced logic nodes.7
The AI accelerator is no longer just designed at the die level. It is designed at the package and rack level.
XIII. ASML, High-NA, and Intel’s technology wedge
ASML’s 2025 Annual Report frames AI demand as fuelling capacity build-up across a broad customer base and points to High-NA EUV progress as part of the leading-edge toolset.8 Reuters reported that ASML said first chips made with new High-NA machines were expected within months, with Intel framed as the most aggressive adopter of High-NA while TSMC has been cautious because of cost.9
High-NA could become part of Intel’s technology differentiation. But High-NA adoption does not automatically create customer trust. It must translate into better cost, yield, density, performance, or time-to-market.
High-NA can help Intel tell a technology story. Customers still need a manufacturing story.
XIV. AI infrastructure makes Intel optionality valuable
AI infrastructure customers increasingly want options beyond pure technology — U.S.-based leading-edge capacity, advanced packaging alternatives, geographic resilience, second-source leverage, reduced dependence on a single foundry, government-aligned supply chains, supply-chain risk management, and negotiation leverage.
U.S. leading-edge capacity
Geographic diversification
Second-source negotiation
Optionality gets Intel into the conversation. Trust gets Intel the wafer order.
XV. What could break the thesis?
Intel has technology progress, but not yet enough customer trust to be a true leading-edge external foundry.
- 18A without external pull. Intel improves 18A but still fails to convince external customers.2
- Leverage tool. Customers use Intel mainly as leverage against TSMC and Samsung.1
- 14A short of customers. 14A does not secure enough committed volume.2
- Node pause. Intel pauses or scales back 14A or successor nodes per its own filings.2
- Dual identity. Intel as competitor and foundry remains a trust problem.
- TSMC widens lead. N2, N2P, A16, A14, A13, CoWoS, SoIC, COUPE keep compounding.7
- Samsung secondary. Samsung remains a more natural second source for some workloads.
- Capital pressure. Foundry losses pressure capital allocation.3
- Packaging without wafer. Packaging grows but does not prove wafer competitiveness.
- Support > trust. Government support cannot replace customer trust.
- High-NA cost. High-NA is expensive and may not create enough near-term advantage.9
XVI. What could break the bear case?
Intel does not need to become TSMC overnight. It needs to become credible enough to be the strategic second source.
- AI capacity scarcity. AI infrastructure needs more leading-edge capacity.8
- Packaging demand. Advanced packaging demand is large and growing.7
- Resilience demand. Customers want geographic resilience.
- Policy alignment. Governments want domestic leading-edge capacity.
- TSMC concentration. Concentration risk is structural.6
- Intel assets. Fabs, capital, engineers, packaging, and political relevance are real.2
- 18A credibility. A clean 18A ramp rebuilds trust.2
- 14A wedge. 14A could become the first real external-customer node.2
- Package → wafer. Packaging could pull customers into deeper Intel relationships.4
- Niche share is enough. Even a small share of AI infrastructure foundry demand can be meaningful.
Intel does not need to become TSMC overnight. It needs to become credible enough to be the strategic second source.
XVII. What to watch
- 18A yield progress.4
- 18A product ramp.2
- Intel 18A-P timing.2
- 14A PDK maturity.10
- 14A customer test chips.5
- Committed external 14A customer.2
- External Foundry revenue.3
- Foundry operating loss.3
- Advanced packaging backlog.4
- Malaysia back-end expansion.4
- EMIB / Foveros customer wins.2
- High-NA EUV progress.9
- Nvidia / Broadcom / Qualcomm / Amazon test-chip updates.5
- Actual product tape-outs at Intel nodes.
- Committed wafer volume.
- TSMC N2 / N2P / A16 / A14 progress.7
- Samsung SF2 / SF2P progress.
- Government funding outcomes.
- Intel capital allocation discipline.3
- Public Intel Foundry Direct Connect updates.10
Glossary
A short reference for the vocabulary used above. Definitions are simplified.
- Foundry
- Company that manufactures chips designed by other companies.
- External customer
- Customer outside the foundry’s own product organisation.
- Wafer volume
- Committed production volume on a semiconductor process.
- Tape-out
- Final design handoff before chip manufacturing.
- PDK
- Process design kit used by chip designers.
- 18A
- Intel leading-edge process node with RibbonFET and PowerVia.
- 14A
- Intel next-generation node designed with external customers in mind.
- RibbonFET
- Intel’s gate-all-around transistor architecture.
- PowerVia
- Intel’s backside power delivery technology.
- Advanced packaging
- Integration of multiple dies, chiplets, memory, and interconnect in one package.
- EMIB
- Intel embedded multi-die interconnect bridge.
- Foveros
- Intel 3D packaging technology.
- CoWoS
- TSMC advanced packaging used to integrate compute and HBM.
- High-NA EUV
- Next-generation lithography with higher numerical aperture.
- HBM
- High-bandwidth memory used near AI accelerators.
- Customer trust
- Confidence in yield, PDKs, support, capacity, confidentiality, and roadmap execution.
XVIII. The foundry trust test
Intel’s foundry comeback will not be proven by logos, evaluations, or packaging wins.
It will be proven by committed external wafer volume.
The 2021 Amazon / Qualcomm hype showed the danger of confusing narrative with customer commitment. In 2026, Intel has real 18A progress and a serious packaging wedge. But 14A is the trust test.
None of this is a bet that Intel is dead. None of it is a bet that Intel is back. It is a bet that semiconductors only work one way: customers either commit production volume, or they do not. The 2021 thesis aged well because it understood that distinction. The 2026 thesis depends on it too.
Foundry is a trust business. Trust is built customer by customer, tape-out by tape-out, ramp by ramp. Intel has more of the technology pieces than it did in 2021. It still has the same hard question to answer.
That is the foundry trust test.
1 Patel, D. (Jul 2021). Intel Grossly Exaggerates Foundry “Wins” With Qualcomm And Amazon, There Are No Deals For Manufacturing Chips. SemiAnalysis. Historical anchor for the 2021 framing of Intel Foundry, including the Amazon-as-packaging vs wafer customer split, Amazon’s NIC / networking / silicon-photonics context, Qualcomm as Intel 20A evaluation rather than a committed product, Cristiano Amon’s “no specific product plan” framing, Qualcomm as potential leverage with TSMC and Samsung, and the deeper warning about logos vs real foundry deals. Used as inspiration only. No content, structure, or charts reproduced.
2 Intel Corporation. SEC filings — Form 10-K and quarterly filings. Intel’s 2025 Annual Report / 10-K is the source for: nearly all Intel Foundry business currently supports internal Intel Products; few external customers to date; no significant external foundry customer to date; 18A high-volume manufacturing in 2025 with RibbonFET and PowerVia; 14A designed from inception for external customers; risk of pausing / discontinuing 14A and successor nodes if no significant external customer; possible shift to third-party foundries (particularly TSMC) beyond 18A / 18A-P; and the packaging roadmap including EMIB and Foveros.
3 Intel Corporation. Q1 2026 financial results press release. Source for total Intel revenue and Intel Foundry segment revenue / operating loss directional framing referenced in this essay.
4 Intel Corporation. Q1 2026 prepared remarks PDF (Intel Investor Relations). Yield improvement framing across Intel 4, Intel 3, and 18A; 14A investment for internal and external customer evaluations; advanced-packaging backlog framing; multi-year back-end expansion in Malaysia; committed packaging demand beginning to convert to revenue in 2027.
5 Reuters. Reporting on Intel’s manufacturing customer pipeline, including limited committed external customer volumes for upcoming manufacturing technologies and test-chip activity with customers such as Nvidia and Broadcom. Used at the level of the cited reporting; test chips treated as evaluation activity, not committed production.
6 TSMC. 2025 Annual Report. Roughly 12,682 products manufactured for ~534 customers using ~305 distinct process technologies; advanced technologies at 7nm and below at 74% of wafer revenue; 3nm at ~24% of wafer revenue; 2nm in HVM in Q4 2025 with good yield framing.
7 TSMC (2026). 2026 North America Technology Symposium. Roadmap context including N2 / N2P / A16 / A14 / A13 framing and the CoWoS / SoIC / COUPE packaging surface for AI / HPC. Specific 5.5-reticle and 14-reticle CoWoS claims used here only at the level the cited material supports.
8 ASML (2025). 2025 Annual Report, strategic report section. AI demand fuelling capacity build-up across a broad customer base; EUV adoption context; High-NA progress framing.
9 Reuters. ASML High-NA progress update framing first chips from new High-NA machines as expected within months, with Intel framed as the most aggressive High-NA adopter while TSMC has been cautious because of cost. Used at the level of the cited reporting.
10 Intel Corporation. Intel news & events — Intel Foundry Direct Connect 2025. Source for 14A PDK framing, 18A / 18A-P / 18A-PT roadmap, 14A test-chip framing, advanced packaging roadmap context, and external customer positioning.
11 Qualcomm and Amazon / AWS public materials are referenced in this essay only at the level the cited Intel and SemiAnalysis materials already disclose; specific Qualcomm or AWS chip-design claims are not made without verified sources.
- The Foundry Toll Road. Why TSMC’s pricing power got stronger in the AI era.
- The GAA Credibility Test. Samsung Foundry’s 2nm comeback as a trust test, not a transistor story.
- The Other Leading Edge. GlobalFoundries and the specialty foundry layer of AI infrastructure.
- The Fab That Outlived 3D XPoint. Texas Instruments turning a failed memory fab into 300mm analog.
- The Density Illusion. Why Moore’s Law became a system problem.
- The Dry Resist War. Patterning as a strategic process technology for AI-era chipmaking.
- The AI Memory Wall. DRAM, HBM, packaging, and semicap as the new centre of computing.
- When AI Runs Out of Copper. Optical I/O, co-packaged optics, and the race to replace copper with light.
- The Custom Silicon Flywheel. Hyperscalers turning their biggest workloads into chips.
- The Bubble That Became Infrastructure. Why Nvidia’s 2021 overvaluation story turned into the AI factory thesis.
- The AI Chip Software Wall. Why specialised silicon alone was not enough to beat Nvidia.
- The AI Field Manual. Reference layer for the AI stack: hardware, memory, models, agents, safety, economics.
This is Essay No. 035. The topics: intelligence, AI, systems, knowledge, and the questions underneath the questions everyone else is asking. If you read this far and disagreed with any part of it, write to me. I read everything.